Escape $ dollar sign on Makefiles
I just learned that if you want to use a dollar sign inside a Makefile you need to escape $
with an extra $
, so double it. Otherwise make
will think that you are accessing a make variable, not a shell one.
on shell:
#!/bin/bash
for i in *; do echo "i=$i"; done
on Makefile:
#!make
my-files:
for i in *; do echo "i=$$i"; done
Here's a reference
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